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brd_sbc66ec-r1.h
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1 
36 #ifndef SBC66EC_R1_H
37 #define SBC66EC_R1_H
38 
39 #if defined(BRD_SBC66EC_R1)
40 
45 #if defined(THIS_IS_MAIN_FILE)
46  #if defined(__PIC24FJ256GB206__)
47 
48  #if !defined(CONFIGURATION_FUSES_SET)
49  #define CONFIGURATION_FUSES_SET
50 
51  //Are not defined in p24FJ256GB206
52  #ifndef DEBUG_ON
53  #define DEBUG_ON 0x77FF
54  #endif
55  #ifndef DEBUG_OFF
56  #define DEBUG_OFF 0x7FFF
57  #endif
58 
59  // - JTAG Port Disabled (JTAGEN_OFF)
60  // - General Segment Code Protect = Code protection is enabled (GCP_OFF)
61  // - General Segment Write Protect Disabled (GWRP_OFF)
62  // - Emulator functions are shared with PGEC2/PGED2 (ICS_PGx2)
63  //Watchdog timer can be enabled in software via SWDTEN bit. Resets every 8 seconds
64  // - Watchdog Timer Disabled (FWDTEN_OFF)
65  // - WDT Prescaler = 32 (FWPSA_PR32)
66  // - Watchdog Timer Postscaler = 1:32,768 (WDTPS_PS32768)
67  _CONFIG1(JTAGEN_OFF & GCP_OFF & GWRP_OFF & ICS_PGx2 & FWDTEN_OFF & FWPSA_PR32 & WDTPS_PS8192)
68  //_CONFIG1(JTAGEN_OFF & GCP_OFF & GWRP_OFF & ICS_PGx2 & FWDTEN_OFF & FWPSA_PR32 & WDTPS_PS4096)
69 
70  // - Two Speed Start-up = off (IESO_OFF)
71  // - 96MHz PLL Prescaler = No Divide, for 4MHz input (PLLDIV_NODIV)
72  // - Disable 96MHz PLL = not disabled, don't add anthing to _CONFIG2
73  // - Oscillator Selection = Primary oscillator (XT, HS, EC) w/ PLL (FNOSC_PRIPLL)
74  // - Clock switching and clock monitor = Both disabled (FCKSM_CSDCMD)
75  // - OSCO/RC15 function = RC15 (OSCIOFNC_ON)
76  // - RP Register Protection = Unlimited Writes To RP Registers (IOL1WAY_OFF)
77  // - Oscillator Selection = External Clock (POSCMOD_EC)
78  _CONFIG2(IESO_OFF & PLLDIV_NODIV & FNOSC_PRIPLL & FCKSM_CSDCMD & OSCIOFNC_ON & IOL1WAY_OFF & POSCMOD_EC)
79 
80  // - External Clock Mode (SCLKI), use RC13 as digital IO (SOSCSEL_EC)
81  // - Segment Write Protection Disable (WPDIS_WPDIS)
82  // - Write Protect Configuration Page Select Disabled (WPCFG_WPCFGDIS)
83  // - Segment Write Protection End Page Select = Write Protect from page 0 to WPFP (WPEND_WPSTARTMEM)
84  _CONFIG3(SOSCSEL_EC & WPDIS_WPDIS & WPCFG_WPCFGDIS & WPEND_WPSTARTMEM)
85  #endif
86  #else
87  #error "Not configured for valid CPU"
88  #endif
89 #endif // Prevent more than one set of config fuse definitions
90 
91 //System clock = Fosc. Instruction clock = Fcy = Fosc/2 (in datasheet)
92 #if !defined(CLOCK_FREQ)
93  #define CLOCK_FREQ (32000000ul)
94  #define GetSystemClock() (32000000ul) // Hz
95  #define GetInstructionClock() (GetSystemClock()/2)
96  #define GetPeripheralClock() (GetSystemClock()/2)
97 #endif
98 
99 
100 
101 // *********************************************************************
102 // ----------- Daughter Board Connector Defines for SBC66EC ------------
103 // *********************************************************************
104 #define PORT_ID_MAX 41 //ID of highest used port ID
105 
106 #define UCPORT_00 B0
107 #define UCPORT_ID_00 UCPORT_ID_B0
108 #define PIN_00 _RB0
109 #define PIN_00_BITADR ((volatile WORD)(/*Bit0=0x0nnn*/0x02CA/*PORTB=0x02CA*/ ))
110 #define LAT_00 _LATB0
111 #define LAT_00_BITADR ((volatile WORD)(/*Bit0=0x0nnn*/0x02CC/*LATB=0x02CC*/ ))
112 #define DIR_00 _TRISB0
113 #define TRIS_00_BITADR ((volatile WORD)(/*Bit0=0x0nnn*/0x02C8/*TRISB=0x02C8*/ ))
114 #define PULLUP_00 _CN2PUE
115 #define PULLDOWN_00 _CN2PDE
116 #define PPS_OUT_00 _RP0R
117 #define PPS_IN_00 0
118 
119 #define UCPORT_01 B1
120 #define UCPORT_ID_01 UCPORT_ID_B1
121 #define PIN_01 _RB1
122 #define PIN_01_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12CA/*PORTB=0x02CA*/ ))
123 #define LAT_01 _LATB1
124 #define LAT_01_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12CC/*LATB=0x02CC*/ ))
125 #define DIR_01 _TRISB1
126 #define TRIS_01_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12C8/*TRISB=0x02C8*/ ))
127 #define PULLUP_01 _CN3PUE
128 #define PULLDOWN_01 _CN3PDE
129 #define PPS_OUT_01 _RP1R
130 #define PPS_IN_01 1
131 
132 #define UCPORT_02 B2
133 #define UCPORT_ID_02 UCPORT_ID_B2
134 #define PIN_02 _RB2
135 #define PIN_02_BITADR ((volatile WORD)(/*Bit2=0x2nnn*/0x22CA/*PORTB=0x02CA*/ ))
136 #define LAT_02 _LATB2
137 #define LAT_02_BITADR ((volatile WORD)(/*Bit2=0x2nnn*/0x22CC/*LATB=0x02CC*/ ))
138 #define DIR_02 _TRISB2
139 #define TRIS_02_BITADR ((volatile WORD)(/*Bit2=0x2nnn*/0x22C8/*TRISB=0x02C8*/ ))
140 #define PULLUP_02 _CN4PUE
141 #define PULLDOWN_02 _CN4PDE
142 #define PPS_OUT_02 _RP13R
143 #define PPS_IN_02 13
144 
145 #define UCPORT_03 B3
146 #define UCPORT_ID_03 UCPORT_ID_B3
147 #define PIN_03 _RB3
148 #define PIN_03_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32CA/*PORTB=0x02CA*/ ))
149 #define LAT_03 _LATB3
150 #define LAT_03_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32CC/*LATB=0x02CC*/ ))
151 #define DIR_03 _TRISB3
152 #define TRIS_03_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32C8/*TRISB=0x02C8*/ ))
153 #define PULLUP_03 _CN5PUE
154 #define PULLDOWN_03 _CN5PDE
155 
156 #define UCPORT_04 B4
157 #define UCPORT_ID_04 UCPORT_ID_B4
158 #define PIN_04 _RB4
159 #define PIN_04_BITADR ((volatile WORD)(/*Bit4=0x4nnn*/0x42CA/*PORTB=0x02CA*/ ))
160 #define LAT_04 _LATB4
161 #define LAT_04_BITADR ((volatile WORD)(/*Bit4=0x4nnn*/0x42CC/*LATB=0x02CC*/ ))
162 #define DIR_04 _TRISB4
163 #define TRIS_04_BITADR ((volatile WORD)(/*Bit4=0x4nnn*/0x42C8/*TRISB=0x02C8*/ ))
164 #define PULLUP_04 _CN6PUE
165 #define PULLDOWN_04 _CN6PDE
166 #define PPS_OUT_04 _RP28R
167 #define PPS_IN_04 28
168 
169 #define UCPORT_05 B5
170 #define UCPORT_ID_05 UCPORT_ID_B5
171 #define PIN_05 _RB5
172 #define PIN_05_BITADR ((volatile WORD)(/*Bit5=0x5nnn*/0x52CA/*PORTB=0x02CA*/ ))
173 #define LAT_05 _LATB5
174 #define LAT_05_BITADR ((volatile WORD)(/*Bit5=0x5nnn*/0x52CC/*LATB=0x02CC*/ ))
175 #define DIR_05 _TRISB5
176 #define TRIS_05_BITADR ((volatile WORD)(/*Bit5=0x5nnn*/0x52C8/*TRISB=0x02C8*/ ))
177 #define PULLUP_05 _CN7PUE
178 #define PULLDOWN_05 _CN7PDE
179 #define PPS_OUT_05 _RP18R
180 #define PPS_IN_05 18
181 
182 #define UCPORT_06 G6
183 #define UCPORT_ID_06 UCPORT_ID_G6
184 #define PIN_06 _RG6
185 #define PIN_06_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62F2/*PORTG=0x02F2*/ ))
186 #define LAT_06 _LATG6
187 #define LAT_06_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62F4/*LATG=0x02F4*/ ))
188 #define DIR_06 _TRISG6
189 #define TRIS_06_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62F0/*TRISG=0x02F0*/ ))
190 #define PULLUP_06 _CN8PUE
191 #define PULLDOWN_06 _CN8PDE
192 #define PPS_OUT_06 _RP21R
193 #define PPS_IN_06 21
194 
195 #define UCPORT_07 G7
196 #define UCPORT_ID_07 UCPORT_ID_G7
197 #define PIN_07 _RG7
198 #define PIN_07_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72F2/*PORTG=0x02F2*/ ))
199 #define LAT_07 _LATG7
200 #define LAT_07_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72F4/*LATG=0x02F4*/ ))
201 #define DIR_07 _TRISG7
202 #define TRIS_07_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72F0/*TRISG=0x02F0*/ ))
203 #define PULLUP_07 _CN9PUE
204 #define PULLDOWN_07 _CN9PDE
205 #define PPS_OUT_07 _RP26R
206 #define PPS_IN_07 26
207 
208 #define UCPORT_08 G8
209 #define UCPORT_ID_08 UCPORT_ID_G8
210 #define PIN_08 _RG8
211 #define PIN_08_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82F2/*PORTG=0x02F2*/ ))
212 #define LAT_08 _LATG8
213 #define LAT_08_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82F4/*LATG=0x02F4*/ ))
214 #define DIR_08 _TRISG8
215 #define TRIS_08_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82F0/*TRISG=0x02F0*/ ))
216 #define PULLUP_08 _CN10PUE
217 #define PULLDOWN_08 _CN10PDE
218 #define PPS_OUT_08 _RP19R
219 #define PPS_IN_08 19
220 
221 #define UCPORT_09 G9
222 #define UCPORT_ID_09 UCPORT_ID_G9
223 #define PIN_09 _RG9
224 #define PIN_09_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92F2/*PORTG=0x02F2*/ ))
225 #define LAT_09 _LATG9
226 #define LAT_09_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92F4/*LATG=0x02F4*/ ))
227 #define DIR_09 _TRISG9
228 #define TRIS_09_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92F0/*TRISG=0x02F0*/ ))
229 #define PULLUP_09 _CN11PUE
230 #define PULLDOWN_09 _CN11PDE
231 #define PPS_OUT_09 _RP27R
232 #define PPS_IN_09 27
233 
234 #define UCPORT_10 G8
235 #define UCPORT_ID_10 UCPORT_ID_G8
236 #define PIN_10 _RG8
237 #define PIN_10_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82F2/*PORTG=0x02F2*/ ))
238 #define LAT_10 _LATG8
239 #define LAT_10_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82F4/*LATG=0x02F4*/ ))
240 #define DIR_10 _TRISG8
241 #define TRIS_10_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82F0/*TRISG=0x02F0*/ ))
242 #define PULLUP_10 _CN10PUE
243 #define PULLDOWN_10 _CN10PDE
244 #define PPS_OUT_10 _RP19R
245 #define PPS_IN_10 19
246 
247 #define UCPORT_11 G9
248 #define UCPORT_ID_11 UCPORT_ID_G9
249 #define PIN_11 _RG9
250 #define PIN_11_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92F2/*PORTG=0x02F2*/ ))
251 #define LAT_11 _LATG9
252 #define LAT_11_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92F4/*LATG=0x02F4*/ ))
253 #define DIR_11 _TRISG9
254 #define TRIS_11_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92F0/*TRISG=0x02F0*/ ))
255 #define PULLUP_11 _CN11PUE
256 #define PULLDOWN_11 _CN11PDE
257 #define PPS_OUT_11 _RP27R
258 #define PPS_IN_11 27
259 
260 #define UCPORT_12 D9
261 #define UCPORT_ID_12 UCPORT_ID_D9
262 #define PIN_12 _RD9
263 #define PIN_12_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92DA/*PORTD=0x02DA*/ ))
264 #define LAT_12 _LATD9
265 #define LAT_12_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92DC/*LATD=0x02DC*/ ))
266 #define DIR_12 _TRISD9
267 #define TRIS_12_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92D8/*TRISD=0x02D8*/ ))
268 #define PULLUP_12 _CN54PUE
269 #define PULLDOWN_12 _CN54PDE
270 #define PPS_OUT_12 _RP4R
271 #define PPS_IN_12 4
272 
273 #define UCPORT_13 D10
274 #define UCPORT_ID_13 UCPORT_ID_D10
275 #define PIN_13 _RD10
276 #define PIN_13_BITADR ((volatile WORD)(/*Bit10=0xAnnn*/0xA2DA/*PORTD=0x02DA*/ ))
277 #define LAT_13 _LATD10
278 #define LAT_13_BITADR ((volatile WORD)(/*Bit10=0xAnnn*/0xA2DC/*LATD=0x02DC*/ ))
279 #define DIR_13 _TRISD10
280 #define TRIS_13_BITADR ((volatile WORD)(/*Bit10=0xAnnn*/0xA2D8/*TRISD=0x02D8*/ ))
281 #define PULLUP_13 _CN55PUE
282 #define PULLDOWN_13 _CN55PDE
283 #define PPS_OUT_13 _RP3R
284 #define PPS_IN_13 3
285 
286 //#define UCPORT_14 0 //Dont define is not available!
287 #define UCPORT_ID_14 UCPORT_ID_NA
288 #define PIN_14_BITADR BITADR_NA
289 #define LAT_14_BITADR BITADR_NA
290 #define TRIS_14_BITADR BITADR_NA
291 
292 //#define UCPORT_15 0 //Dont define is not available!
293 #define UCPORT_ID_15 UCPORT_ID_NA
294 #define PIN_15_BITADR BITADR_NA
295 #define LAT_15_BITADR BITADR_NA
296 #define TRIS_15_BITADR BITADR_NA
297 
298 //#define UCPORT_16 0 //Dont define is not available!
299 #define UCPORT_ID_16 UCPORT_ID_NA
300 #define PIN_16_BITADR BITADR_NA
301 #define LAT_16_BITADR BITADR_NA
302 #define TRIS_16_BITADR BITADR_NA
303 
304 //#define UCPORT_17 0 //Dont define is not available!
305 #define UCPORT_ID_17 UCPORT_ID_NA
306 #define PIN_17_BITADR BITADR_NA
307 #define LAT_17_BITADR BITADR_NA
308 #define TRIS_17_BITADR BITADR_NA
309 
310 //#define UCPORT_18 0 //Dont define is not available!
311 #define UCPORT_ID_18 UCPORT_ID_NA
312 #define PIN_18_BITADR BITADR_NA
313 #define LAT_18_BITADR BITADR_NA
314 #define TRIS_18_BITADR BITADR_NA
315 
316 //#define UCPORT_19 0 //Dont define is not available!
317 #define UCPORT_ID_19 UCPORT_ID_NA
318 #define PIN_19_BITADR BITADR_NA
319 #define LAT_19_BITADR BITADR_NA
320 #define TRIS_19_BITADR BITADR_NA
321 
322 #define UCPORT_20 B6
323 #define UCPORT_ID_20 UCPORT_ID_B6
324 #define PIN_20 _RB6
325 #define PIN_20_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62CA/*PORTB=0x02CA*/ ))
326 #define LAT_20 _LATB6
327 #define LAT_20_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62CC/*LATB=0x02CC*/ ))
328 #define DIR_20 _TRISB6
329 #define TRIS_20_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62C8/*TRISB=0x02C8*/ ))
330 #define PULLUP_20 _CN24PUE
331 #define PULLDOWN_20 _CN24PDE
332 #define PPS_OUT_20 _RP6R
333 #define PPS_IN_20 6
334 
335 #define UCPORT_21 B7
336 #define UCPORT_ID_21 UCPORT_ID_B7
337 #define PIN_21 _RB7
338 #define PIN_21_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72CA/*PORTB=0x02CA*/ ))
339 #define LAT_21 _LATB7
340 #define LAT_21_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72CC/*LATB=0x02CC*/ ))
341 #define DIR_21 _TRISB7
342 #define TRIS_21_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72C8/*TRISB=0x02C8*/ ))
343 #define PULLUP_21 _CN25PUE
344 #define PULLDOWN_21 _CN25PDE
345 #define PPS_OUT_21 _RP7R
346 #define PPS_IN_21 7
347 
348 //#define UCPORT_22 0 //Dont define is not available!
349 #define UCPORT_ID_22 UCPORT_ID_NA
350 #define LAT_22_BITADR BITADR_NA
351 #define PIN_22_BITADR BITADR_NA
352 #define TRIS_22_BITADR BITADR_NA
353 
354 //#define UCPORT_23 0 //Dont define is not available!
355 #define UCPORT_ID_23 UCPORT_ID_NA
356 #define LAT_23_BITADR BITADR_NA
357 #define PIN_23_BITADR BITADR_NA
358 #define TRIS_23_BITADR BITADR_NA
359 
360 //#define UCPORT_24 0 //Dont define is not available!
361 #define UCPORT_ID_24 UCPORT_ID_NA
362 #define PIN_24_BITADR BITADR_NA
363 #define LAT_24_BITADR BITADR_NA
364 #define TRIS_24_BITADR BITADR_NA
365 
366 //#define UCPORT_25 0 //Dont define is not available!
367 #define UCPORT_ID_25 UCPORT_ID_NA
368 #define PIN_25_BITADR BITADR_NA
369 #define LAT_25_BITADR BITADR_NA
370 #define TRIS_25_BITADR BITADR_NA
371 
372 #define UCPORT_26 F1
373 #define UCPORT_ID_26 UCPORT_ID_F1
374 #define PIN_26 _RF1
375 #define PIN_26_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12EA/*PORTF=0x02EA*/ ))
376 #define LAT_26 _LATF1
377 #define LAT_26_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12EC/*LATF=0x02EC*/ ))
378 #define DIR_26 _TRISF1
379 #define TRIS_26_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12E8/*TRISF=0x02E8*/ ))
380 #define PULLUP_26 _CN69PUE
381 #define PULLDOWN_26 _CN69PDE
382 #define PPS_OUT_26 _RP2R
383 
384 #define UCPORT_27 F3
385 #define UCPORT_ID_27 UCPORT_ID_F3
386 #define PIN_27 _RF3
387 #define PIN_27_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32EA/*PORTF=0x02EA*/ ))
388 #define LAT_27 _LATF3
389 #define LAT_27_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32EC/*LATF=0x02EC*/ ))
390 #define DIR_27 _TRISF3
391 #define TRIS_27_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32E8/*TRIS=0x02E8*/ ))
392 #define PULLUP_27 _CN71PUE
393 #define PULLDOWN_27 _CN71PDE
394 #define PPS_OUT_27 _RP16R
395 #define PPS_IN_27 16
396 
397 #define UCPORT_28 F4
398 #define UCPORT_ID_28 UCPORT_ID_F4
399 #define PIN_28 _RF4
400 #define PIN_28_BITADR ((volatile WORD)(/*Bit4=0x4nnn*/0x42EA/*PORTF=0x02EA*/ ))
401 #define LAT_28 _LATF4
402 #define LAT_28_BITADR ((volatile WORD)(/*Bit4=0x4nnn*/0x42EC/*LATF=0x02EC*/ ))
403 #define DIR_28 _TRISF4
404 #define TRIS_28_BITADR ((volatile WORD)(/*Bit4=0x4nnn*/0x42E8/*TRISF=0x02E8*/ ))
405 #define PULLUP_28 _CN17PUE
406 #define PULLDOWN_28 _CN17PDE
407 #define PPS_OUT_28 _RP10R
408 #define PPS_IN_28 10
409 
410 #define UCPORT_29 D8
411 #define UCPORT_ID_29 UCPORT_ID_D8
412 #define PIN_29 _RD8
413 #define PIN_29_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82DA/*PORTD=0x02DA*/ ))
414 #define LAT_29 _LATD8
415 #define LAT_29_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82DC/*LATD=0x02DC*/ ))
416 #define DIR_29 _TRISD8
417 #define TRIS_29_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82D8/*TRISD=0x02D8*/ ))
418 #define PULLUP_29 _CN53PUE
419 #define PULLDOWN_29 _CN53PDE
420 #define PPS_IN_29 2
421 
422 #define UCPORT_30 B8
423 #define UCPORT_ID_30 UCPORT_ID_B8
424 #define PIN_30 _RB8
425 #define PIN_30_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82CA/*PORTB=0x02CA*/ ))
426 #define LAT_30 _LATB8
427 #define LAT_30_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82CC/*LATB=0x02CC*/ ))
428 #define DIR_30 _TRISB8
429 #define TRIS_30_BITADR ((volatile WORD)(/*Bit8=0x8nnn*/0x82C8/*TRISB=0x02C8*/ ))
430 #define PULLUP_30 _CN26PUE
431 #define PULLDOWN_30 _CN26PDE
432 #define PPS_OUT_30 _RP8R
433 #define PPS_IN_30 8
434 
435 #define UCPORT_31 B9
436 #define UCPORT_ID_31 UCPORT_ID_B9
437 #define PIN_31 _RB9
438 #define PIN_31_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92CA/*PORTB=0x02CA*/ ))
439 #define LAT_31 _LATB9
440 #define LAT_31_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92CC/*LATB=0x02CC*/ ))
441 #define DIR_31 _TRISB9
442 #define TRIS_31_BITADR ((volatile WORD)(/*Bit9=0x9nnn*/0x92C8/*TRISB=0x02C8*/ ))
443 #define PULLUP_31 _CN27PUE
444 #define PULLDOWN_31 _CN27PDE
445 #define PPS_OUT_31 _RP9R
446 #define PPS_IN_31 9
447 
448 #define UCPORT_32 B10
449 #define UCPORT_ID_32 UCPORT_ID_B10
450 #define PIN_32 _RB10
451 #define PIN_32_BITADR ((volatile WORD)(/*Bit10=0xAnnn*/0xA2CA/*PORTB=0x02CA*/ ))
452 #define LAT_32 _LATB10
453 #define LAT_32_BITADR ((volatile WORD)(/*Bit10=0xAnnn*/0xA2CC/*LATB=0x02CC*/ ))
454 #define DIR_32 _TRISB10
455 #define TRIS_32_BITADR ((volatile WORD)(/*Bit10=0xAnnn*/0xA2C8/*TRISB=0x02C8*/ ))
456 #define PULLUP_32 _CN28PUE
457 #define PULLDOWN_32 _CN28PDE
458 
459 #define UCPORT_33 B11
460 #define UCPORT_ID_33 UCPORT_ID_B11
461 #define PIN_33 _RB11
462 #define PIN_33_BITADR ((volatile WORD)(/*Bit11=0xBnnn*/0xB2CA/*PORTB=0x02CA*/ ))
463 #define LAT_33 _LATB11
464 #define LAT_33_BITADR ((volatile WORD)(/*Bit11=0xBnnn*/0xB2CC/*LATB=0x02CC*/ ))
465 #define DIR_33 _TRISB11
466 #define TRIS_33_BITADR ((volatile WORD)(/*Bit11=0xBnnn*/0xB2C8/*TRISB=0x02C8*/ ))
467 #define PULLUP_33 _CN29PUE
468 #define PULLDOWN_33 _CN29PDE
469 
470 #define UCPORT_34 B12
471 #define UCPORT_ID_34 UCPORT_ID_B12
472 #define PIN_34 _RB12
473 #define PIN_34_BITADR ((volatile WORD)(/*Bit12=0xCnnn*/0xC2CA/*PORTB=0x02CA*/ ))
474 #define LAT_34 _LATB12
475 #define LAT_34_BITADR ((volatile WORD)(/*Bit12=0xCnnn*/0xC2CC/*LATB=0x02CC*/ ))
476 #define DIR_34 _TRISB12
477 #define TRIS_34_BITADR ((volatile WORD)(/*Bit12=0xCnnn*/0xC2C8/*TRISB=0x02C8*/ ))
478 #define PULLUP_34 _CN30PUE
479 #define PULLDOWN_34 _CN30PDE
480 
481 #define UCPORT_35 B13
482 #define UCPORT_ID_35 UCPORT_ID_B13
483 #define PIN_35 _RB13
484 #define PIN_35_BITADR ((volatile WORD)(/*Bit13=0xDnnn*/0xD2CA/*PORTB=0x02CA*/ ))
485 #define LAT_35 _LATB13
486 #define LAT_35_BITADR ((volatile WORD)(/*Bit13=0xDnnn*/0xD2CC/*LATB=0x02CC*/ ))
487 #define DIR_35 _TRISB13
488 #define TRIS_35_BITADR ((volatile WORD)(/*Bit13=0xDnnn*/0xD2C8/*TRISB=0x02C8*/ ))
489 #define PULLUP_35 _CN31PUE
490 #define PULLDOWN_35 _CN31PDE
491 
492 #define UCPORT_36 D0
493 #define UCPORT_ID_36 UCPORT_ID_D0
494 #define PIN_36 _RD0
495 #define PIN_36_BITADR ((volatile WORD)(/*Bit0=0x0nnn*/0x02DA/*PORTD=0x02DA*/ ))
496 #define LAT_36 _LATD0
497 #define LAT_36_BITADR ((volatile WORD)(/*Bit0=0x0nnn*/0x02DC/*LATD=0x02DC*/ ))
498 #define DIR_36 _TRISD0
499 #define TRIS_36_BITADR ((volatile WORD)(/*Bit0=0x0nnn*/0x02D8/*TRISD=0x02D8*/ ))
500 #define PULLUP_36 _CN49PUE
501 #define PULLDOWN_36 _CN49PDE
502 #define PPS_OUT_36 _RP11R
503 #define PPS_IN_36 11
504 
505 #define UCPORT_37 D1
506 #define UCPORT_ID_37 UCPORT_ID_D1
507 #define PIN_37 _RD1
508 #define PIN_37_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12DA/*PORTD=0x02DA*/ ))
509 #define LAT_37 _LATD1
510 #define LAT_37_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12DC/*LATD=0x02DC*/ ))
511 #define DIR_37 _TRISD1
512 #define TRIS_37_BITADR ((volatile WORD)(/*Bit1=0x1nnn*/0x12D8/*TRISD=0x02D8*/ ))
513 #define PULLUP_37 _CN50PUE
514 #define PULLDOWN_37 _CN50PDE
515 #define PPS_OUT_37 _RP24R
516 #define PPS_IN_37 24
517 
518 #define UCPORT_38 D2
519 #define UCPORT_ID_38 UCPORT_ID_D2
520 #define PIN_38 _RD2
521 #define PIN_38_BITADR ((volatile WORD)(/*Bit2=0x2nnn*/0x22DA/*PORTD=0x02DA*/ ))
522 #define LAT_38 _LATD2
523 #define LAT_38_BITADR ((volatile WORD)(/*Bit2=0x2nnn*/0x22DC/*LATD=0x02DC*/ ))
524 #define DIR_38 _TRISD2
525 #define TRIS_38_BITADR ((volatile WORD)(/*Bit2=0x2nnn*/0x22D8/*TRISD=0x02D8*/ ))
526 #define PULLUP_38 _CN51PUE
527 #define PULLDOWN_38 _CN51PDE
528 #define PPS_OUT_38 _RP23R
529 #define PPS_IN_38 23
530 
531 #define UCPORT_39 D3
532 #define UCPORT_ID_39 UCPORT_ID_D3
533 #define PIN_39 _RD3
534 #define PIN_39_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32DA/*PORTD=0x02DA*/ ))
535 #define LAT_39 _LATD3
536 #define LAT_39_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32DC/*LATD=0x02DC*/ ))
537 #define DIR_39 _TRISD3
538 #define TRIS_39_BITADR ((volatile WORD)(/*Bit3=0x3nnn*/0x32D8/*TRISD=0x02D8*/ ))
539 #define PULLUP_39 _CN52PUE
540 #define PULLDOWN_39 _CN52PDE
541 #define PPS_OUT_39 _RP22R
542 #define PPS_IN_39 22
543 
544 #define UCPORT_40 D6
545 #define UCPORT_ID_40 UCPORT_ID_D6
546 #define PIN_40 _RD6
547 #define PIN_40_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62DA/*PORTD=0x02DA*/ ))
548 #define LAT_40 _LATD6
549 #define LAT_40_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62DC/*LATD=0x02DC*/ ))
550 #define DIR_40 _TRISD6
551 #define TRIS_40_BITADR ((volatile WORD)(/*Bit6=0x6nnn*/0x62D8/*TRISD=0x02D8*/ ))
552 #define PULLUP_40 _CN15PUE
553 #define PULLDOWN_40 _CN15PDE
554 
555 #define UCPORT_41 D7
556 #define UCPORT_ID_41 UCPORT_ID_D7
557 #define PIN_41 _RD7
558 #define PIN_41_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72DA/*PORTD=0x02DA*/ ))
559 #define LAT_41 _LATD7
560 #define LAT_41_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72DC/*LATD=0x02DC*/ ))
561 #define DIR_41 _TRISD7
562 #define TRIS_41_BITADR ((volatile WORD)(/*Bit7=0x7nnn*/0x72D8/*TRISD=0x02D8*/ ))
563 #define PULLUP_41 _CN16PUE
564 #define PULLDOWN_41 _CN16PDE
565 
566 //#define UCPORT_42 0 //Dont define is not available!
567 #define UCPORT_ID_42 UCPORT_ID_NA
568 #define PIN_42_BITADR BITADR_NA
569 #define LAT_42_BITADR BITADR_NA
570 #define TRIS_42_BITADR BITADR_NA
571 
572 //#define UCPORT_43 0 //Dont define is not available!
573 #define UCPORT_ID_43 UCPORT_ID_NA
574 #define PIN_43_BITADR BITADR_NA
575 #define LAT_43_BITADR BITADR_NA
576 #define TRIS_43_BITADR BITADR_NA
577 
578 //#define UCPORT_44 0 //Dont define is not available!
579 #define UCPORT_ID_44 UCPORT_ID_NA
580 #define PIN_44_BITADR BITADR_NA
581 #define LAT_44_BITADR BITADR_NA
582 #define TRIS_44_BITADR BITADR_NA
583 
584 //#define UCPORT_45 0 //Dont define is not available!
585 #define UCPORT_ID_45 UCPORT_ID_NA
586 #define PIN_45_BITADR BITADR_NA
587 #define LAT_45_BITADR BITADR_NA
588 #define TRIS_45_BITADR BITADR_NA
589 
590 
591 //I2C ports
592 #define PORT_ID_SDA1 12
593 #define UCPORT_SDA1 UCPORT_12
594 #define UCPORT_ID_SDA1 UCPORT_ID_12
595 #define PIN_SDA1 PIN_12
596 #define PIN_SDA1_BITADR PIN_12_BITADR
597 #define LAT_SDA1 LAT_12
598 #define LAT_SDA1_BITADR LAT_12_BITADR
599 #define DIR_SDA1 DIR_12
600 #define TRIS_SDA1_BITADR TRIS_12_BITADR
601 #define PULLUP_SDA1 PULLUP_12
602 #define PULLDOWN_SDA1 PULLDOWN_12
603 
604 #define PORT_ID_SCL1 13
605 #define UCPORT_SCL1 UCPORT_13
606 #define UCPORT_ID_SCL1 UCPORT_ID_13
607 #define PIN_SCL1 PIN_13
608 #define PIN_SCL1_BITADR PIN_13_BITADR
609 #define LAT_SCL1 LAT_13
610 #define LAT_SCL1_BITADR LAT_13_BITADR
611 #define DIR_SCL1 DIR_13
612 #define TRIS_SCL1_BITADR TRIS_13_BITADR
613 #define PULLUP_SCL1 PULLUP_13
614 #define PULLDOWN_SCL1 PULLDOWN_13
615 
616 #define PORT_ID_SDA2 28
617 #define UCPORT_SDA2 UCPORT_28
618 #define UCPORT_ID_SDA2 UCPORT_ID_28
619 #define PIN_SDA2 PIN_28
620 #define PIN_SDA2_BITADR PIN_28_BITADR
621 #define LAT_SDA2 LAT_28
622 #define LAT_SDA2_BITADR LAT_28_BITADR
623 #define DIR_SDA2 DIR_28
624 #define TRIS_SDA2_BITADR TRIS_28_BITADR
625 #define PULLUP_SDA2 PULLUP_28
626 #define PULLDOWN_SDA2 PULLDOWN_28
627 
628 #define PORT_ID_SCL2 29
629 #define UCPORT_SCL2 UCPORT_29
630 #define UCPORT_ID_SCL2 UCPORT_ID_29
631 #define PIN_SCL2 PIN_29
632 #define PIN_SCL2_BITADR PIN_29_BITADR
633 #define LAT_SCL2 LAT_29
634 #define LAT_SCL2_BITADR LAT_29_BITADR
635 #define DIR_SCL2 DIR_29
636 #define TRIS_SCL2_BITADR TRIS_29_BITADR
637 #define PULLUP_SCL2 PULLUP_29
638 #define PULLDOWN_SCL2 PULLDOWN_29
639 
640 //#define UCPORT_SDA3 0 //Dont define is not available!
641 
642 //#define UCPORT_SCL3 0 //Dont define is not available!
643 
644 
645 
646 // *********************************************************************
647 // ---------------- Analog Netcruzer Port Names --------------------
648 // *********************************************************************
649 #define PIN_A0 PIN_00
650 #define PIN_A0_BITADR PIN_00_BITADR
651 #define LAT_A0 LAT_00
652 #define LAT_A0_BITADR LAT_00_BITADR
653 #define DIR_A0 DIR_00
654 #define TRIS_A0_BITADR TRIS_00_BITADR
655 #define PULLUP_A0 PULLUP_00
656 #define PULLDOWN_A0 PULLDOWN_00
657 
658 #define PIN_A1 PIN_01
659 #define PIN_A1_BITADR PIN_01_BITADR
660 #define LAT_A1 LAT_01
661 #define LAT_A1_BITADR LAT_01_BITADR
662 #define DIR_A1 DIR_01
663 #define TRIS_A1_BITADR TRIS_01_BITADR
664 #define PULLUP_A1 PULLUP_01
665 #define PULLDOWN_A1 PULLDOWN_01
666 
667 #define PIN_A2 PIN_02
668 #define PIN_A2_BITADR PIN_02_BITADR
669 #define LAT_A2 LAT_02
670 #define LAT_A2_BITADR LAT_02_BITADR
671 #define DIR_A2 DIR_02
672 #define TRIS_A2_BITADR TRIS_02_BITADR
673 #define PULLUP_A2 PULLUP_02
674 #define PULLDOWN_A2 PULLDOWN_02
675 
676 #define PIN_A3 PIN_03
677 #define PIN_A3_BITADR PIN_03_BITADR
678 #define LAT_A3 LAT_03
679 #define LAT_A3_BITADR LAT_03_BITADR
680 #define DIR_A3 DIR_03
681 #define TRIS_A3_BITADR TRIS_03_BITADR
682 #define PULLUP_A3 PULLUP_03
683 #define PULLDOWN_A3 PULLDOWN_03
684 
685 #define PIN_A4 PIN_04
686 #define PIN_A4_BITADR PIN_04_BITADR
687 #define LAT_A4 LAT_04
688 #define LAT_A4_BITADR LAT_04_BITADR
689 #define DIR_A4 DIR_04
690 #define TRIS_A4_BITADR TRIS_04_BITADR
691 #define PULLUP_A4 PULLUP_04
692 #define PULLDOWN_A4 PULLDOWN_04
693 
694 #define PIN_A5 PIN_05
695 #define PIN_A5_BITADR PIN_05_BITADR
696 #define LAT_A5 LAT_05
697 #define LAT_A5_BITADR LAT_05_BITADR
698 #define DIR_A5 DIR_05
699 #define TRIS_A5_BITADR TRIS_05_BITADR
700 #define PULLUP_A5 PULLUP_05
701 #define PULLDOWN_A5 PULLDOWN_05
702 
703 #define PIN_A6 PIN_30
704 #define PIN_A6_BITADR PIN_30_BITADR
705 #define LAT_A6 LAT_30
706 #define LAT_A6_BITADR LAT_30_BITADR
707 #define DIR_A6 DIR_30
708 #define TRIS_A6_BITADR TRIS_30_BITADR
709 #define PULLUP_A6 PULLUP_30
710 #define PULLDOWN_A6 PULLDOWN_30
711 
712 #define PIN_A7 PIN_31
713 #define PIN_A7_BITADR PIN_31_BITADR
714 #define LAT_A7 LAT_31
715 #define LAT_A7_BITADR LAT_31_BITADR
716 #define DIR_A7 DIR_31
717 #define TRIS_A7_BITADR TRIS_31_BITADR
718 #define PULLUP_A7 PULLUP_31
719 #define PULLDOWN_A7 PULLDOWN_31
720 
721 #define PIN_A8 PIN_32
722 #define PIN_A8_BITADR PIN_32_BITADR
723 #define LAT_A8 LAT_32
724 #define LAT_A8_BITADR LAT_32_BITADR
725 #define DIR_A8 DIR_32
726 #define TRIS_A8_BITADR TRIS_32_BITADR
727 #define PULLUP_A8 PULLUP_32
728 #define PULLDOWN_A8 PULLDOWN_32
729 
730 #define PIN_A9 PIN_33
731 #define PIN_A9_BITADR PIN_33_BITADR
732 #define LAT_A9 LAT_33
733 #define LAT_A9_BITADR LAT_33_BITADR
734 #define DIR_A9 DIR_33
735 #define TRIS_A9_BITADR TRIS_33_BITADR
736 #define PULLUP_A9 PULLUP_33
737 #define PULLDOWN_A9 PULLDOWN_33
738 
739 #define PIN_A10 PIN_34
740 #define PIN_A10_BITADR PIN_34_BITADR
741 #define LAT_A10 LAT_34
742 #define LAT_A10_BITADR LAT_34_BITADR
743 #define DIR_A10 DIR_34
744 #define TRIS_A10_BITADR TRIS_34_BITADR
745 #define PULLUP_A10 PULLUP_34
746 #define PULLDOWN_A10 PULLDOWN_34
747 
748 #define PIN_A11 PIN_35
749 #define PIN_A11_BITADR PIN_35_BITADR
750 #define LAT_A11 LAT_35
751 #define LAT_A11_BITADR LAT_35_BITADR
752 #define DIR_A11 DIR_35
753 #define TRIS_A11_BITADR TRIS_35_BITADR
754 #define PULLUP_A11 PULLUP_35
755 #define PULLDOWN_A11 PULLDOWN_35
756 
757 
758 
759 // *********************************************************************
760 // ---------------- Old to New Netcruzer Port Names --------------------
761 // *********************************************************************
762 #define UCPORT_SC UCPORT_13
763 #define UCPORT_ID_SC UCPORT_ID_13
764 #define PIN_SC PIN_13
765 #define PIN_SC_BITADR PIN_13_BITADR
766 #define LAT_SC LAT_13
767 #define LAT_SC_BITADR LAT_13_BITADR
768 #define DIR_SC DIR_13
769 #define TRIS_SC_BITADR TRIS_13_BITADR
770 #define PULLUP_SC PULLUP_13
771 #define PULLDOWN_SC PULLDOWN_13
772 #define PPS_OUT_SC PPS_OUT_13
773 #define PPS_IN_SC PPS_IN_13
774 
775 #define UCPORT_SD UCPORT_12
776 #define UCPORT_ID_SD UCPORT_ID_12
777 #define PIN_SD PIN_12
778 #define PIN_SD_BITADR PIN_12_BITADR
779 #define LAT_SD LAT_12
780 #define LAT_SD_BITADR LAT_12_BITADR
781 #define DIR_SD DIR_12
782 #define TRIS_SD_BITADR TRIS_12_BITADR
783 #define PULLUP_SD PULLUP_12
784 #define PULLDOWN_SD PULLDOWN_12
785 #define PPS_OUT_SD PPS_OUT_12
786 #define PPS_IN_SD PPS_IN_12
787 
788 #define UCPORT_S0 UCPORT_24
789 #define UCPORT_ID_S0 UCPORT_ID_24
790 #define PIN_S0 PIN_24
791 #define PIN_S0_BITADR PIN_24_BITADR
792 #define LAT_S0 LAT_24
793 #define LAT_S0_BITADR LAT_24_BITADR
794 #define DIR_S0 DIR_24
795 #define TRIS_S0_BITADR TRIS_24_BITADR
796 #define PULLUP_S0 PULLUP_24
797 #define PULLDOWN_S0 PULLDOWN_24
798 #define PPS_OUT_S0 PPS_OUT_24
799 #define PPS_IN_S0 PPS_IN_24
800 
801 #define UCPORT_S1 UCPORT_25
802 #define UCPORT_ID_S1 UCPORT_ID_25
803 #define PIN_S1 PIN_25
804 #define PIN_S1_BITADR PIN_25_BITADR
805 #define LAT_S1 LAT_25
806 #define LAT_S1_BITADR LAT_25_BITADR
807 #define DIR_S1 DIR_25
808 #define TRIS_S1_BITADR TRIS_25_BITADR
809 #define PULLUP_S1 PULLUP_25
810 #define PULLDOWN_S1 PULLDOWN_25
811 #define PPS_OUT_S1 PPS_OUT_25
812 #define PPS_IN_S1 PPS_IN_25
813 
814 #define UCPORT_T0 UCPORT_20
815 #define UCPORT_ID_T0 UCPORT_ID_20
816 #define PIN_T0 PIN_20
817 #define PIN_T0_BITADR PIN_20_BITADR
818 #define LAT_T0 LAT_20
819 #define LAT_T0_BITADR LAT_20_BITADR
820 #define DIR_T0 DIR_20
821 #define TRIS_T0_BITADR TRIS_20_BITADR
822 #define PULLUP_T0 PULLUP_20
823 #define PULLDOWN_T0 PULLDOWN_20
824 #define PPS_OUT_T0 PPS_OUT_20
825 #define PPS_IN_T0 PPS_IN_20
826 
827 #define UCPORT_T1 UCPORT_21
828 #define UCPORT_ID_T1 UCPORT_ID_21
829 #define PIN_T1 PIN_21
830 #define PIN_T1_BITADR PIN_21_BITADR
831 #define LAT_T1 LAT_21
832 #define LAT_T1_BITADR LAT_21_BITADR
833 #define DIR_T1 DIR_21
834 #define TRIS_T1_BITADR TRIS_21_BITADR
835 #define PULLUP_T1 PULLUP_21
836 #define PULLDOWN_T1 PULLDOWN_21
837 #define PPS_OUT_T1 PPS_OUT_21
838 #define PPS_IN_T1 PPS_IN_21
839 
840 #define UCPORT_T2 UCPORT_22
841 #define UCPORT_ID_T2 UCPORT_ID_22
842 #define PIN_T2 PIN_22
843 #define PIN_T2_BITADR PIN_22_BITADR
844 #define LAT_T2 LAT_22
845 #define LAT_T2_BITADR LAT_22_BITADR
846 #define DIR_T2 DIR_22
847 #define TRIS_T2_BITADR TRIS_22_BITADR
848 #define PULLUP_T2 PULLUP_22
849 #define PULLDOWN_T2 PULLDOWN_22
850 #define PPS_OUT_T2 PPS_OUT_22
851 #define PPS_IN_T2 PPS_IN_22
852 
853 #define UCPORT_T3 UCPORT_23
854 #define UCPORT_ID_T3 UCPORT_ID_23
855 #define PIN_T3 PIN_23
856 #define PIN_T3_BITADR PIN_23_BITADR
857 #define LAT_T3 LAT_23
858 #define LAT_T3_BITADR LAT_23_BITADR
859 #define DIR_T3 DIR_23
860 #define TRIS_T3_BITADR TRIS_23_BITADR
861 #define PULLUP_T3 PULLUP_23
862 #define PULLDOWN_T3 PULLDOWN_23
863 #define PPS_OUT_T3 PPS_OUT_23
864 #define PPS_IN_T3 PPS_IN_23
865 
866 #define UCPORT_T4 UCPORT_26
867 #define UCPORT_ID_T4 UCPORT_ID_26
868 #define PIN_T4 PIN_26
869 #define PIN_T4_BITADR PIN_26_BITADR
870 #define LAT_T4 LAT_26
871 #define LAT_T4_BITADR LAT_26_BITADR
872 #define DIR_T4 DIR_26
873 #define TRIS_T4_BITADR TRIS_26_BITADR
874 #define PULLUP_T4 PULLUP_26
875 #define PULLDOWN_T4 PULLDOWN_26
876 #define PPS_OUT_T4 PPS_OUT_26
877 #define PPS_IN_T4 PPS_IN_26
878 
879 #define UCPORT_T5 UCPORT_27
880 #define UCPORT_ID_T5 UCPORT_ID_27
881 #define PIN_T5 PIN_27
882 #define PIN_T5_BITADR PIN_27_BITADR
883 #define LAT_T5 LAT_27
884 #define LAT_T5_BITADR LAT_27_BITADR
885 #define DIR_T5 DIR_27
886 #define TRIS_T5_BITADR TRIS_27_BITADR
887 #define PULLUP_T5 PULLUP_27
888 #define PULLDOWN_T5 PULLDOWN_27
889 #define PPS_OUT_T5 PPS_OUT_27
890 #define PPS_IN_T5 PPS_IN_27
891 
892 #define UCPORT_T6 UCPORT_28
893 #define UCPORT_ID_T6 UCPORT_ID_28
894 #define PIN_T6 PIN_28
895 #define PIN_T6_BITADR PIN_28_BITADR
896 #define LAT_T6 LAT_28
897 #define LAT_T6_BITADR LAT_28_BITADR
898 #define DIR_T6 DIR_28
899 #define TRIS_T6_BITADR TRIS_28_BITADR
900 #define PULLUP_T6 PULLUP_28
901 #define PULLDOWN_T6 PULLDOWN_28
902 #define PPS_OUT_T6 PPS_OUT_28
903 #define PPS_IN_T6 PPS_IN_28
904 
905 #define UCPORT_T7 UCPORT_29
906 #define UCPORT_ID_T7 UCPORT_ID_29
907 #define PIN_T7 PIN_29
908 #define PIN_T7_BITADR PIN_29_BITADR
909 #define LAT_T7 LAT_29
910 #define LAT_T7_BITADR LAT_29_BITADR
911 #define DIR_T7 DIR_29
912 #define TRIS_T7_BITADR TRIS_29_BITADR
913 #define PULLUP_T7 PULLUP_29
914 #define PULLDOWN_T7 PULLDOWN_29
915 #define PPS_OUT_T7 PPS_OUT_29
916 #define PPS_IN_T7 PPS_IN_29
917 
918 #define UCPORT_X0 UCPORT_00
919 #define UCPORT_ID_X0 UCPORT_ID_00
920 #define PIN_X0 PIN_00
921 #define PIN_X0_BITADR PIN_00_BITADR
922 #define LAT_X0 LAT_00
923 #define LAT_X0_BITADR LAT_00_BITADR
924 #define DIR_X0 DIR_00
925 #define TRIS_X0_BITADR TRIS_00_BITADR
926 #define PULLUP_X0 PULLUP_00
927 #define PULLDOWN_X0 PULLDOWN_00
928 #define PPS_OUT_X0 PPS_OUT_00
929 #define PPS_IN_X0 PPS_IN_00
930 
931 #define UCPORT_X1 UCPORT_01
932 #define UCPORT_ID_X1 UCPORT_ID_01
933 #define PIN_X1 PIN_01
934 #define PIN_X1_BITADR PIN_01_BITADR
935 #define LAT_X1 LAT_01
936 #define LAT_X1_BITADR LAT_01_BITADR
937 #define DIR_X1 DIR_01
938 #define TRIS_X1_BITADR TRIS_01_BITADR
939 #define PULLUP_X1 PULLUP_01
940 #define PULLDOWN_X1 PULLDOWN_01
941 #define PPS_OUT_X1 PPS_OUT_01
942 #define PPS_IN_X1 PPS_IN_01
943 
944 #define UCPORT_X2 UCPORT_02
945 #define UCPORT_ID_X2 UCPORT_ID_02
946 #define PIN_X2 PIN_02
947 #define PIN_X2_BITADR PIN_02_BITADR
948 #define LAT_X2 LAT_02
949 #define LAT_X2_BITADR LAT_02_BITADR
950 #define DIR_X2 DIR_02
951 #define TRIS_X2_BITADR TRIS_02_BITADR
952 #define PULLUP_X2 PULLUP_02
953 #define PULLDOWN_X2 PULLDOWN_02
954 #define PPS_OUT_X2 PPS_OUT_02
955 #define PPS_IN_X2 PPS_IN_02
956 
957 #define UCPORT_X3 UCPORT_03
958 #define UCPORT_ID_X3 UCPORT_ID_03
959 #define PIN_X3 PIN_03
960 #define PIN_X3_BITADR PIN_03_BITADR
961 #define LAT_X3 LAT_03
962 #define LAT_X3_BITADR LAT_03_BITADR
963 #define DIR_X3 DIR_03
964 #define TRIS_X3_BITADR TRIS_03_BITADR
965 #define PULLUP_X3 PULLUP_03
966 #define PULLDOWN_X3 PULLDOWN_03
967 #define PPS_OUT_X3 PPS_OUT_03
968 #define PPS_IN_X3 PPS_IN_03
969 
970 #define UCPORT_X4 UCPORT_04
971 #define UCPORT_ID_X4 UCPORT_ID_04
972 #define PIN_X4 PIN_04
973 #define PIN_X4_BITADR PIN_04_BITADR
974 #define LAT_X4 LAT_04
975 #define LAT_X4_BITADR LAT_04_BITADR
976 #define DIR_X4 DIR_04
977 #define TRIS_X4_BITADR TRIS_04_BITADR
978 #define PULLUP_X4 PULLUP_04
979 #define PULLDOWN_X4 PULLDOWN_04
980 #define PPS_OUT_X4 PPS_OUT_04
981 #define PPS_IN_X4 PPS_IN_04
982 
983 #define UCPORT_X5 UCPORT_05
984 #define UCPORT_ID_X5 UCPORT_ID_05
985 #define PIN_X5 PIN_05
986 #define PIN_X5_BITADR PIN_05_BITADR
987 #define LAT_X5 LAT_05
988 #define LAT_X5_BITADR LAT_05_BITADR
989 #define DIR_X5 DIR_05
990 #define TRIS_X5_BITADR TRIS_05_BITADR
991 #define PULLUP_X5 PULLUP_05
992 #define PULLDOWN_X5 PULLDOWN_05
993 #define PPS_OUT_X5 PPS_OUT_05
994 #define PPS_IN_X5 PPS_IN_05
995 
996 #define UCPORT_X6 UCPORT_06
997 #define UCPORT_ID_X6 UCPORT_ID_06
998 #define PIN_X6 PIN_06
999 #define PIN_X6_BITADR PIN_06_BITADR
1000 #define LAT_X6 LAT_06
1001 #define LAT_X6_BITADR LAT_06_BITADR
1002 #define DIR_X6 DIR_06
1003 #define TRIS_X6_BITADR TRIS_06_BITADR
1004 #define PULLUP_X6 PULLUP_06
1005 #define PULLDOWN_X6 PULLDOWN_06
1006 #define PPS_OUT_X6 PPS_OUT_06
1007 #define PPS_IN_X6 PPS_IN_06
1008 
1009 #define UCPORT_X7 UCPORT_07
1010 #define UCPORT_ID_X7 UCPORT_ID_07
1011 #define PIN_X7 PIN_07
1012 #define PIN_X7_BITADR PIN_07_BITADR
1013 #define LAT_X7 LAT_07
1014 #define LAT_X7_BITADR LAT_07_BITADR
1015 #define DIR_X7 DIR_07
1016 #define TRIS_X7_BITADR TRIS_07_BITADR
1017 #define PULLUP_X7 PULLUP_07
1018 #define PULLDOWN_X7 PULLDOWN_07
1019 #define PPS_OUT_X7 PPS_OUT_07
1020 #define PPS_IN_X7 PPS_IN_07
1021 
1022 #define UCPORT_X8 UCPORT_08
1023 #define UCPORT_ID_X8 UCPORT_ID_08
1024 #define PIN_X8 PIN_08
1025 #define PIN_X8_BITADR PIN_08_BITADR
1026 #define LAT_X8 LAT_08
1027 #define LAT_X8_BITADR LAT_08_BITADR
1028 #define DIR_X8 DIR_08
1029 #define TRIS_X8_BITADR TRIS_08_BITADR
1030 #define PULLUP_X8 PULLUP_08
1031 #define PULLDOWN_X8 PULLDOWN_08
1032 #define PPS_OUT_X8 PPS_OUT_08
1033 #define PPS_IN_X8 PPS_IN_08
1034 
1035 #define UCPORT_X9 UCPORT_09
1036 #define UCPORT_ID_X9 UCPORT_ID_09
1037 #define PIN_X9 PIN_09
1038 #define PIN_X9_BITADR PIN_09_BITADR
1039 #define LAT_X9 LAT_09
1040 #define LAT_X9_BITADR LAT_09_BITADR
1041 #define DIR_X9 DIR_09
1042 #define TRIS_X9_BITADR TRIS_09_BITADR
1043 #define PULLUP_X9 PULLUP_09
1044 #define PULLDOWN_X9 PULLDOWN_09
1045 #define PPS_OUT_X9 PPS_OUT_09
1046 #define PPS_IN_X9 PPS_IN_09
1047 
1048 #define UCPORT_X10 UCPORT_10
1049 #define UCPORT_ID_X10 UCPORT_ID_10
1050 #define PIN_X10 PIN_10
1051 #define PIN_X10_BITADR PIN_10_BITADR
1052 #define LAT_X10 LAT_10
1053 #define LAT_X10_BITADR LAT_10_BITADR
1054 #define DIR_X10 DIR_10
1055 #define TRIS_X10_BITADR TRIS_10_BITADR
1056 #define PULLUP_X10 PULLUP_10
1057 #define PULLDOWN_X10 PULLDOWN_10
1058 #define PPS_OUT_X10 PPS_OUT_10
1059 #define PPS_IN_X10 PPS_IN_10
1060 
1061 #define UCPORT_X11 UCPORT_11
1062 #define UCPORT_ID_X11 UCPORT_ID_11
1063 #define PIN_X11 PIN_11
1064 #define PIN_X11_BITADR PIN_11_BITADR
1065 #define LAT_X11 LAT_11
1066 #define LAT_X11_BITADR LAT_11_BITADR
1067 #define DIR_X11 DIR_11
1068 #define TRIS_X11_BITADR TRIS_11_BITADR
1069 #define PULLUP_X11 PULLUP_11
1070 #define PULLDOWN_X11 PULLDOWN_11
1071 #define PPS_OUT_X11 PPS_OUT_11
1072 #define PPS_IN_X11 PPS_IN_11
1073 
1074 #define UCPORT_Y0 UCPORT_30
1075 #define UCPORT_ID_Y0 UCPORT_ID_30
1076 #define PIN_Y0 PIN_30
1077 #define PIN_Y0_BITADR PIN_30_BITADR
1078 #define LAT_Y0 LAT_30
1079 #define LAT_Y0_BITADR LAT_30_BITADR
1080 #define DIR_Y0 DIR_30
1081 #define TRIS_Y0_BITADR TRIS_30_BITADR
1082 #define PULLUP_Y0 PULLUP_30
1083 #define PULLDOWN_Y0 PULLDOWN_30
1084 #define PPS_OUT_Y0 PPS_OUT_30
1085 #define PPS_IN_Y0 PPS_IN_30
1086 
1087 #define UCPORT_Y1 UCPORT_31
1088 #define UCPORT_ID_Y1 UCPORT_ID_31
1089 #define PIN_Y1 PIN_31
1090 #define PIN_Y1_BITADR PIN_31_BITADR
1091 #define LAT_Y1 LAT_31
1092 #define LAT_Y1_BITADR LAT_31_BITADR
1093 #define DIR_Y1 DIR_31
1094 #define TRIS_Y1_BITADR TRIS_31_BITADR
1095 #define PULLUP_Y1 PULLUP_31
1096 #define PULLDOWN_Y1 PULLDOWN_31
1097 #define PPS_OUT_Y1 PPS_OUT_31
1098 #define PPS_IN_Y1 PPS_IN_31
1099 
1100 #define UCPORT_Y2 UCPORT_32
1101 #define UCPORT_ID_Y2 UCPORT_ID_32
1102 #define PIN_Y2 PIN_32
1103 #define PIN_Y2_BITADR PIN_32_BITADR
1104 #define LAT_Y2 LAT_32
1105 #define LAT_Y2_BITADR LAT_32_BITADR
1106 #define DIR_Y2 DIR_32
1107 #define TRIS_Y2_BITADR TRIS_32_BITADR
1108 #define PULLUP_Y2 PULLUP_32
1109 #define PULLDOWN_Y2 PULLDOWN_32
1110 #define PPS_OUT_Y2 PPS_OUT_32
1111 #define PPS_IN_Y2 PPS_IN_32
1112 
1113 #define UCPORT_Y3 UCPORT_33
1114 #define UCPORT_ID_Y3 UCPORT_ID_33
1115 #define PIN_Y3 PIN_33
1116 #define PIN_Y3_BITADR PIN_33_BITADR
1117 #define LAT_Y3 LAT_33
1118 #define LAT_Y3_BITADR LAT_33_BITADR
1119 #define DIR_Y3 DIR_33
1120 #define TRIS_Y3_BITADR TRIS_33_BITADR
1121 #define PULLUP_Y3 PULLUP_33
1122 #define PULLDOWN_Y3 PULLDOWN_33
1123 #define PPS_OUT_Y3 PPS_OUT_33
1124 #define PPS_IN_Y3 PPS_IN_33
1125 
1126 #define UCPORT_Y4 UCPORT_34
1127 #define UCPORT_ID_Y4 UCPORT_ID_34
1128 #define PIN_Y4 PIN_34
1129 #define PIN_Y4_BITADR PIN_34_BITADR
1130 #define LAT_Y4 LAT_34
1131 #define LAT_Y4_BITADR LAT_34_BITADR
1132 #define DIR_Y4 DIR_34
1133 #define TRIS_Y4_BITADR TRIS_34_BITADR
1134 #define PULLUP_Y4 PULLUP_34
1135 #define PULLDOWN_Y4 PULLDOWN_34
1136 #define PPS_OUT_Y4 PPS_OUT_34
1137 #define PPS_IN_Y4 PPS_IN_34
1138 
1139 #define UCPORT_Y5 UCPORT_35
1140 #define UCPORT_ID_Y5 UCPORT_ID_35
1141 #define PIN_Y5 PIN_35
1142 #define PIN_Y5_BITADR PIN_35_BITADR
1143 #define LAT_Y5 LAT_35
1144 #define LAT_Y5_BITADR LAT_35_BITADR
1145 #define DIR_Y5 DIR_35
1146 #define TRIS_Y5_BITADR TRIS_35_BITADR
1147 #define PULLUP_Y5 PULLUP_35
1148 #define PULLDOWN_Y5 PULLDOWN_35
1149 #define PPS_OUT_Y5 PPS_OUT_35
1150 #define PPS_IN_Y5 PPS_IN_35
1151 
1152 #define UCPORT_Y6 UCPORT_36
1153 #define UCPORT_ID_Y6 UCPORT_ID_36
1154 #define PIN_Y6 PIN_36
1155 #define PIN_Y6_BITADR PIN_36_BITADR
1156 #define LAT_Y6 LAT_36
1157 #define LAT_Y6_BITADR LAT_36_BITADR
1158 #define DIR_Y6 DIR_36
1159 #define TRIS_Y6_BITADR TRIS_36_BITADR
1160 #define PULLUP_Y6 PULLUP_36
1161 #define PULLDOWN_Y6 PULLDOWN_36
1162 #define PPS_OUT_Y6 PPS_OUT_36
1163 #define PPS_IN_Y6 PPS_IN_36
1164 
1165 #define UCPORT_Y7 UCPORT_37
1166 #define UCPORT_ID_Y7 UCPORT_ID_37
1167 #define PIN_Y7 PIN_37
1168 #define PIN_Y7_BITADR PIN_37_BITADR
1169 #define LAT_Y7 LAT_37
1170 #define LAT_Y7_BITADR LAT_37_BITADR
1171 #define DIR_Y7 DIR_37
1172 #define TRIS_Y7_BITADR TRIS_37_BITADR
1173 #define PULLUP_Y7 PULLUP_37
1174 #define PULLDOWN_Y7 PULLDOWN_37
1175 #define PPS_OUT_Y7 PPS_OUT_37
1176 #define PPS_IN_Y7 PPS_IN_37
1177 
1178 #define UCPORT_Y8 UCPORT_38
1179 #define UCPORT_ID_Y8 UCPORT_ID_38
1180 #define PIN_Y8 PIN_38
1181 #define PIN_Y8_BITADR PIN_38_BITADR
1182 #define LAT_Y8 LAT_38
1183 #define LAT_Y8_BITADR LAT_38_BITADR
1184 #define DIR_Y8 DIR_38
1185 #define TRIS_Y8_BITADR TRIS_38_BITADR
1186 #define PULLUP_Y8 PULLUP_38
1187 #define PULLDOWN_Y8 PULLDOWN_38
1188 #define PPS_OUT_Y8 PPS_OUT_38
1189 #define PPS_IN_Y8 PPS_IN_38
1190 
1191 #define UCPORT_Y9 UCPORT_39
1192 #define UCPORT_ID_Y9 UCPORT_ID_39
1193 #define PIN_Y9 PIN_39
1194 #define PIN_Y9_BITADR PIN_39_BITADR
1195 #define LAT_Y9 LAT_39
1196 #define LAT_Y9_BITADR LAT_39_BITADR
1197 #define DIR_Y9 DIR_39
1198 #define TRIS_Y9_BITADR TRIS_39_BITADR
1199 #define PULLUP_Y9 PULLUP_39
1200 #define PULLDOWN_Y9 PULLDOWN_39
1201 #define PPS_OUT_Y9 PPS_OUT_39
1202 #define PPS_IN_Y9 PPS_IN_39
1203 
1204 #define UCPORT_Y10 UCPORT_40
1205 #define UCPORT_ID_Y10 UCPORT_ID_40
1206 #define PIN_Y10 PIN_40
1207 #define PIN_Y10_BITADR PIN_40_BITADR
1208 #define LAT_Y10 LAT_40
1209 #define LAT_Y10_BITADR LAT_40_BITADR
1210 #define DIR_Y10 DIR_40
1211 #define TRIS_Y10_BITADR TRIS_40_BITADR
1212 #define PULLUP_Y10 PULLUP_40
1213 #define PULLDOWN_Y10 PULLDOWN_40
1214 #define PPS_OUT_Y10 PPS_OUT_40
1215 #define PPS_IN_Y10 PPS_IN_40
1216 
1217 #define UCPORT_Y11 UCPORT_41
1218 #define UCPORT_ID_Y11 UCPORT_ID_41
1219 #define PIN_Y11 PIN_41
1220 #define PIN_Y11_BITADR PIN_41_BITADR
1221 #define LAT_Y11 LAT_41
1222 #define LAT_Y11_BITADR LAT_41_BITADR
1223 #define DIR_Y11 DIR_41
1224 #define TRIS_Y11_BITADR TRIS_41_BITADR
1225 #define PULLUP_Y11 PULLUP_41
1226 #define PULLDOWN_Y11 PULLDOWN_41
1227 #define PPS_OUT_Y11 PPS_OUT_41
1228 #define PPS_IN_Y11 PPS_IN_41
1229 
1230 
1231 
1232 // *********************************************************************
1233 // -------------------- Some general CPU Defines -----------------------
1234 // *********************************************************************
1235 #define PWM_COUNT 9 //Hardware PWM channels
1236 
1237 
1238 
1239 // *********************************************************************
1240 // ---------------------------- Analog Defines -------------------------
1241 // *********************************************************************
1242 #define ADC_REF_MV 2500 //ADC External Reference in MV
1243 #define ADC_MAX_CHAN_BRD 12 //Maximum number of possible ADC channels, B0-B5, B8-B11, B14, B15 (rev2+)
1244 
1245 //The channel mask indicates what AN channels can be used for ADC inputs
1246 #define ADC_CHANNEL_MASK_LOW_BRD 0b0011111100111111 //AN0-AN5, AN8-AN13
1247 #define ADC_CHANNEL_MASK_HIGH_BRD 0 //Only has 16 ADC channels
1248 
1249 //Index for selected analog input in adcFilter[] and adcValue[] arrays. Some analog inputs do not have space assigned for them
1250 #define ADC_CH_A0 0 //AN0
1251 #define ADC_CH_A1 1 //AN1
1252 #define ADC_CH_A2 2 //AN2
1253 #define ADC_CH_A3 3 //AN3
1254 #define ADC_CH_A4 4 //AN4
1255 #define ADC_CH_A5 5 //AN5
1256 #define ADC_CH_A6 8 //AN8
1257 #define ADC_CH_A7 9 //AN9
1258 #define ADC_CH_A8 10 //AN10
1259 #define ADC_CH_A9 11 //AN11
1260 #define ADC_CH_A10 12 //AN12
1261 #define ADC_CH_A11 13 //AN13
1262 
1263 #define ADC_OPEN_A0 0x0001 //AN0
1264 #define ADC_OPEN_A1 0x0002 //AN1
1265 #define ADC_OPEN_A2 0x0004 //AN2
1266 #define ADC_OPEN_A3 0x0008 //AN3
1267 #define ADC_OPEN_A4 0x0010 //AN4
1268 #define ADC_OPEN_A5 0x0020 //AN5
1269 #define ADC_OPEN_A6 0x0100 //AN8
1270 #define ADC_OPEN_A7 0x0200 //AN9
1271 #define ADC_OPEN_A8 0x0400 //AN10
1272 #define ADC_OPEN_A9 0x0800 //AN11
1273 #define ADC_OPEN_A10 0x1000 //AN12
1274 #define ADC_OPEN_A11 0x2000 //AN13
1275 
1276 
1277 
1278 // *********************************************************************
1279 // --------------------------- Other IO Defines ------------------------
1280 // *********************************************************************
1281 #define PIN_SYSLED _RB6
1282 #define LAT_SYSLED _LATB6
1283 #define DIR_SYSLED _TRISB6
1284 #define PULLUP_SYSLED _CN24PUE
1285 #define PULLDOWN_SYSLED _CN24PDE
1286 
1287 
1288 
1289 // *********************************************************************
1290 // ------------------ Define ports for this board ----------------------
1291 // *********************************************************************
1292 #define UC_PORT_B0_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1293 #define UC_PORT_B1_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1294 #define UC_PORT_B2_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1295 #define UC_PORT_B3_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1296 #define UC_PORT_B4_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1297 #define UC_PORT_B5_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1298 #define UC_PORT_B6_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1299 #define UC_PORT_B7_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1300 #define UC_PORT_B8_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1301 #define UC_PORT_B9_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1302 #define UC_PORT_B10_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1303 #define UC_PORT_B11_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1304 #define UC_PORT_B12_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1305 #define UC_PORT_B13_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_ANALOG_IN | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1306 
1307 #define UC_PORT_D0_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V | UCPORT_PROP_INT)
1308 #define UC_PORT_D1_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V)
1309 #define UC_PORT_D2_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V)
1310 #define UC_PORT_D3_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V)
1311 #define UC_PORT_D6_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1312 #define UC_PORT_D7_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1313 #define UC_PORT_D8_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V)
1314 #define UC_PORT_D9_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V)
1315 #define UC_PORT_D10_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V)
1316 
1317 #define UC_PORT_F0_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1318 #define UC_PORT_F1_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V)
1319 #define UC_PORT_F3_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V)
1320 #define UC_PORT_F4_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN | UCPORT_PROP_5V) /* Do NOT include SDA, seeing that matching SCL is not available */
1321  //G6, F7,G8,G9
1322 #define UC_PORT_G6_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1323 #define UC_PORT_G7_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1324 #define UC_PORT_G8_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1325 #define UC_PORT_G9_PROP (UCPORT_PROP_DIG_IN | UCPORT_PROP_DIG_OUT | UCPORT_PROP_OPEN_COL | UCPORT_PROP_RP | UCPORT_PROP_PULLUP | UCPORT_PROP_PULLDOWN)
1326 
1327 
1328 // *********************************************************************
1329 // ---------------- Network ENC624J600 WiFi I/O pins -------------------
1330 // *********************************************************************
1331 // Auto-crossover pins on Fast 100Mbps Ethernet PICtail/PICtail Plus. If
1332 // your circuit doesn't have such a feature, delete these two defines.
1333 // TODO check if this is needed?
1334 //#define ENC100_MDIX_TRIS (TRISBbits.TRISB5)
1335 //#define ENC100_MDIX_IO (LATBbits.LATB5)
1336 
1337 // ENC624J600 I/O control and status pins
1338 // If a pin is not required for your selected ENC100_INTERFACE_MODE
1339 // interface selection (ex: WRH/B1SEL for PSP modes 1, 2, 5, and 6), then
1340 // you can ignore, delete, or put anything for the pin definition. Also,
1341 // the INT and POR pins are entirely optional. If not connected, comment
1342 // them out.
1343 //#define ENC100_INT_TRIS (TRISAbits.TRISA15) // INT signal is optional and currently unused in the Microchip TCP/IP Stack. Leave this pin disconnected and comment out this pin definition if you don't want it.
1344 //#define ENC100_INT_IO (PORTAbits.RA15)
1345 // PSP control signal pinout
1346 //#define ENC100_CS_TRIS (TRISGbits.TRISG8) // CS is optional in PSP mode. If you are not sharing the parallel bus with another device, tie CS to Vdd and comment out this pin definition.
1347 //#define ENC100_CS_IO (LATGbits.LATG8)
1348 //#define ENC100_POR_TRIS (TRISEbits.TRISE9) // POR signal is optional. If your application doesn't have a power disconnect feature, comment out this pin definition.
1349 //#define ENC100_POR_IO (LATEbits.LATE9)
1350 #define ENC100_SO_WR_B0SEL_EN_TRIS (TRISDbits.TRISD4)
1351 #define ENC100_SO_WR_B0SEL_EN_IO (LATDbits.LATD4)
1352 #define ENC100_SI_RD_RW_TRIS (TRISDbits.TRISD5)
1353 #define ENC100_SI_RD_RW_IO (LATDbits.LATD5)
1354 #define ENC100_SCK_AL_TRIS (TRISBbits.TRISB15)
1355 #define ENC100_SCK_AL_IO (LATBbits.LATB15)
1356 
1357 #if !defined(ENC100_INTERFACE_MODE)
1358  // ENC624J600 Interface Configuration, using PSP Mode 5
1359  // Comment out ENC100_INTERFACE_MODE if you don't have an ENC424J600.
1360  // - 5: 8-bit multiplexed PSP Mode 5 with RD and WR pins
1361  #define ENC100_INTERFACE_MODE 5
1362 
1363  // Indirect addressing is used = reduced number of pins can be used
1364  // for indirect addressing.
1365  #define ENC100_PSP_USE_INDIRECT_RAM_ADDRESSING
1366 
1367  // ENC424J600/624J600 parallel indirect address remapping macro function.
1368  // This section translates SFR and RAM addresses presented to the
1369  // ReadMemory() and WriteMemory() APIs in ENCX24J600.c to the actual
1370  // addresses that must be presented on the parallel interface. This macro
1371  // must be modified to match your hardware if you are using an indirect PSP
1372  // addressing mode (ENC100_PSP_USE_INDIRECT_RAM_ADDRESSING is defined) and
1373  // have some of your address lines tied off to Vdd. If you are using the
1374  // SPI interface, then this section can be ignored or deleted.
1375  #if (ENC100_INTERFACE_MODE == 1) || (ENC100_INTERFACE_MODE == 2) || (ENC100_INTERFACE_MODE == 5) || (ENC100_INTERFACE_MODE == 6) // 8-bit PSP
1376  //#define ENC100_TRANSLATE_TO_PIN_ADDR(a) ((((a)&0x0100)<<6) | ((a)&0x00FF))
1377  //For the SBC66EC, bit 8 uses AD8 pin
1378  #define ENC100_TRANSLATE_TO_PIN_ADDR(a) ((a)&0x01FF)
1379  #elif (ENC100_INTERFACE_MODE == 3) || (ENC100_INTERFACE_MODE == 4) // 16-bit PSP
1380  #define ENC100_TRANSLATE_TO_PIN_ADDR(a) (a)
1381  #endif
1382 
1383  // ENC624J600 Bit Bang PSP I/O macros and pin configuration for address and
1384  // data. If using the SPI interface (ENC100_INTERFACE_MODE is 0) then this
1385  // section is not used and can be ignored or deleted. The Enhanced PMP
1386  // module available on the PIC24FJ256DA210 family will not work with the
1387  // ENC424J600/624J600, so bit bang mode must be used if parallel access is
1388  // desired.
1389  #define ENC100_BIT_BANG_PMP
1390  #if defined(ENC100_BIT_BANG_PMP)
1391  #if ENC100_INTERFACE_MODE == 5 || ENC100_INTERFACE_MODE == 6 // Mutliplexed 8-bit address/data modes
1392  #if defined(ENC100_PSP_USE_INDIRECT_RAM_ADDRESSING) // Only ENCX24J600 address pins AD0-AD8 connected (AD9-AD14 tied to Vdd)
1393  #define ENC100_INIT_PSP_BIT_BANG() do{ANSB &= 0x7FFF;} while(0) // RE0-RE7, RF5, RD4, RD5 (AD0-AD7, AD8, WR, RD) pins are already digital only pins. RB15 (AL) needs to be made digital only.
1394 
1395  // TODO To optimize code size, check if F5 can be left as output!
1396  //#define ENC100_SET_AD_TRIS_IN() do{((volatile BYTE*)&TRISE)[0] = 0xFF;}while(0)
1397  #define ENC100_SET_AD_TRIS_IN() do{((volatile BYTE*)&TRISE)[0] = 0xFF; TRISFbits.TRISF5 = 1;}while(0)
1398 
1399  #define ENC100_SET_AD_TRIS_OUT() do{((volatile BYTE*)&TRISE)[0] = 0x00; TRISFbits.TRISF5 = 0;}while(0)
1400  #define ENC100_GET_AD_IO() (((volatile BYTE*)&PORTE)[0])
1401  #define ENC100_SET_AD_IO(data) do{WORD _wSetMacro = (data); ((volatile BYTE*)&LATE)[0] = (BYTE)_wSetMacro; LATFbits.LATF5 = 0; if(_wSetMacro & 0x0100) LATFbits.LATF5 = 1;}while(0)
1402  #define ENC100_SET_AD_IOL(data) (((volatile BYTE*)&LATE)[0] = (BYTE)(data))
1403  #else // All ENCX24J600 address pins AD0-AD14 connected
1404  #error "No defined"
1405  #endif
1406  #else
1407  #error "No defined"
1408  #endif
1409  #endif
1410 #endif
1411 
1412 
1413 
1414 // *********************************************************************
1415 // ---------------- Network MRF24WB0M WiFi I/O pins --------------------
1416 // *********************************************************************
1417 // #define WF_CS_TRIS (TRISGbits.TRISG8) // Comment this line out if you are using the ENC28J60, ENC424J600/624J600, or other network controller.
1418 // #define WF_CS_IO (LATGbits.LATG8)
1419 // #define WF_SDI_TRIS (TRISBbits.TRISB1)
1420 // #define WF_SCK_TRIS (TRISDbits.TRISD8)
1421 // #define WF_SDO_TRIS (TRISBbits.TRISB0)
1422 // #define WF_RESET_TRIS (TRISAbits.TRISA15)
1423 // #define WF_RESET_IO (LATAbits.LATA15)
1424 // #define WF_INT_TRIS (TRISEbits.TRISE9) // INT1
1425 // #define WF_INT_IO (PORTEbits.RE9)
1426 // #define WF_HIBERNATE_TRIS (TRISAbits.TRISA7)
1427 // #define WF_HIBERNATE_IO (LATAbits.LATA7)
1428 // #define WF_INT_EDGE (INTCON2bits.INT1EP)
1429 // #define WF_INT_IE (IEC1bits.INT1IE)
1430 // #define WF_INT_IF (IFS1bits.INT1IF)
1431 // #define WF_SSPBUF (SPI1BUF)
1432 // #define WF_SPISTAT (SPI1STAT)
1433 // #define WF_SPISTATbits (SPI1STATbits)
1434 // #define WF_SPICON1 (SPI1CON1)
1435 // #define WF_SPICON1bits (SPI1CON1bits)
1436 // #define WF_SPICON2 (SPI1CON2)
1437 // #define WF_SPI_IE (IEC0bits.SPI1IE)
1438 // //#define WF_SPI_IP (IPC2bits.SPI1IP)
1439 // #define WF_SPI_IF (IFS0bits.SPI1IF)
1440 
1441 
1442 
1443 // *********************************************************************
1444 // --------------------- spiFlash Configuration ------------------------
1445 // *********************************************************************
1446 #define SPI_FLASH_SECTOR_SIZE (4096ul)
1447 //#define SPI_FLASH_PAGE_SIZE (0ul) // SST has no page boundary requirements
1448 #define SPI_FLASH_PAGE_SIZE (256ul) // Winbond FLASH has 256 byte pages
1449 #define SPI_FLASH_SIZE (0x400000ul) // Flash is 4MByte
1450 
1451 
1452 // *********************************************************************
1453 // ----------------- SPI External FLASH and EEPROM ---------------------
1454 // *********************************************************************
1455 // To use SST (SST25VF016B) flash, SPI_FLASH_SECTOR_SIZE is 4096, and define SPI_FLASH_PAGE_SIZE as 0.
1456 // To use Winbond flash, SPI_FLASH_SECTOR_SIZE is 4096, and define SPI_FLASH_PAGE_SIZE as 256.
1457 #define SPIFLASH_CS_TRIS (TRISCbits.TRISC13)
1458 #define SPIFLASH_CS_IO (LATCbits.LATC13)
1459 
1460 // External EEPROM I/O pins
1461 #define EEPROM_CS_TRIS (TRISCbits.TRISC15)
1462 #define EEPROM_CS_IO (LATCbits.LATC15)
1463 
1464 // To use SST (SST25VF016B) flash, SPI_FLASH_SECTOR_SIZE is 4096, and define SPI_FLASH_PAGE_SIZE as 0.
1465 // To use Winbond flash, SPI_FLASH_SECTOR_SIZE is 4096, and define SPI_FLASH_PAGE_SIZE as 256.
1466 #define SPIFLASH_SPI_IF (IFS2bits.SPI2IF)
1467 #define SPIFLASH_SSPBUF (SPI2BUF)
1468 //#define SPIFLASH_SPICON1 (SPI2CON1)
1469 //#define SPIFLASH_SPICON1bits (SPI2CON1bits)
1470 //#define SPIFLASH_SPICON2 (SPI2CON2)
1471 #define SPIFLASH_SPISTAT (SPI2STAT)
1472 #define SPIFLASH_SPISTATbits (SPI2STATbits)
1473 
1474 // External EEPROM
1475 #define EEPROM_SPI_IF (IFS2bits.SPI2IF)
1476 #define EEPROM_SSPBUF (SPI2BUF)
1477 //#define EEPROM_SPICON1 (SPI2CON1)
1478 //#define EEPROM_SPICON1bits (SPI2CON1bits)
1479 //#define EEPROM_SPICON2 (SPI2CON2)
1480 #define EEPROM_SPISTAT (SPI2STAT)
1481 #define EEPROM_SPISTATbits (SPI2STATbits)
1482 
1483 
1484 
1485 // *********************************************************************
1486 // ----------- SPI External Mememory Bus Defines for SBC66EC -----------
1487 // *********************************************************************
1488 #define SPIMEM_SPI_IF (IFS2bits.SPI2IF)
1489 #define SPIMEM_SSPBUF (SPI2BUF)
1490 #define SPIMEM_SPICON1 (SPI2CON1)
1491 #define SPIMEM_SPICON1bits (SPI2CON1bits)
1492 #define SPIMEM_SPICON2 (SPI2CON2)
1493 #define SPIMEM_SPISTAT (SPI2STAT)
1494 #define SPIMEM_SPISTATbits (SPI2STATbits)
1495 
1496 // These defines are for the SPI bus used for the external FLASH and EEPROM
1497 #define PIN_SPIMEM_SDO _RB14
1498 #define LAT_SPIMEM_SDO _LATB14
1499 #define DIR_SPIMEM_SDO _TRISB14
1500 //#define PULLUP_SPIMEM_SDO _CN??PUE
1501 //#define PULLDOWN_SPIMEM_SDO _CN??PDE
1502 #define PPS_OUT_SPIMEM_SDO OUT_PIN_PPS_RP14
1503 
1504 #define PIN_SPIMEM_SCK _RD11
1505 #define LAT_SPIMEM_SCK _LATD11
1506 #define DIR_SPIMEM_SCK _TRISD11
1507 //#define PULLUP_SPIMEM_SCK _CN??PUE
1508 //#define PULLDOWN_SPIMEM_SCK _CN??PDE
1509 #define PPS_OUT_SPIMEM_SCK OUT_PIN_PPS_RP12
1510 
1511 #define PIN_SPIMEM_SDI _RC14
1512 #define LAT_SPIMEM_SDI _LATC14
1513 #define DIR_SPIMEM_SDI _TRISC14
1514 //#define PULLUP_SPIMEM_SDI _CN??PUE
1515 //#define PULLDOWN_SPIMEM_SDI _CN??PDE
1516 #define PPS_IN_SPIMEM_SDI IN_PIN_PPS_RPI37
1517 
1518 
1519 
1520 // *********************************************************************
1521 // -------------- USB stack hardware selection options -----------------
1522 // *********************************************************************
1523 //This section is the set of definitions required by the MCHPFSUSB framework. These definitions
1524 //tell the firmware what mode it is running in, and are required by every application developed
1525 //with this revision of the MCHPFSUSB framework.
1526 
1527 //#define USE_SELF_POWER_SENSE_IO
1528 //#define tris_self_power TRISAbits.TRISA2 // Input
1529 #define self_power 1
1530 
1531 //#define USE_USB_BUS_SENSE_IO
1532 //#define tris_usb_bus_sense TRISBbits.TRISB5 // Input
1533 #define USB_BUS_SENSE U1OTGSTATbits.SESVD
1534 
1535 
1536 
1537 // *******************************************************
1538 // ----------------- xEeprom Configuration -----------------
1539 // ********************************************************
1540 #define XEEPROM_SIZE (8192) //Default EEPROM is 25LC640 = 64kBits = 8kBytes)
1541 #define XEEPROM_PAGE_SIZE (32)
1542 
1543 
1554 #define GET_UCPORT_PROP_OFFSET(ucPort) (offsetof(CFG_STRUCT, ucPortProp) + ((offsetof(TABLE_BLOCK_UC66_PORT, ucPort)/sizeof(UCPORT_PROP)) * sizeof(UCPORT_PROP)) )
1555 
1566 #define GET_UCPORT_CONFIG_OFFSET(ucPortVal) (offsetof(CFG_STRUCT, ucPort) + ((offsetof(CFG_BLOCK_UC66_PORT, ucPortVal)/sizeof(UCPORT_CONFIG)) * sizeof(UCPORT_CONFIG)) )
1567 
1568 #endif //#if defined(BRD_SBC66EC_R1)
1569 #endif